Method of making tunnel EEPROM
US5153144A · kind A · utility
49Cited by
15References
37Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 18, 1991 |
| Grant date | Oct 6, 1992 |
| Priority date | — |
| Expiry date | Nov 18, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
An EEPROM (Electrically Erasable Programmable Read Only Memory) has a structure in which the corners of a floating gate electrode of each memory cell MISFET near the source region thereof are rounded. The EEPROM is manufactured by a method characterized in that the ions of an impurity at a high dose are implanted in self-alignment with the floating gate electrode and control gate electrode of the memory cell MISFET so as to form the source and drain regions thereof, whereupon an oxidizing treatment is carried out.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.