Process for manufacturing printed circuit employing selective provision of solderable coating
US5160579A · kind A · utility
50Cited by
9References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 5, 1991 |
| Grant date | Nov 3, 1992 |
| Priority date | — |
| Expiry date | Jun 5, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The areas of a printed circuit where electrical components are to be solder connected, such as throughholes, surrounding pads and surface mount areas, are selectively provided with a metal coating (e.g., tin-lead) which preserves and promotes solderability thereat, by a process in which a photoimageable electrophoretically deposited organic resin is used to provide, on an already patterned surface, an additional resist pattern which selectively exposes areas on which the solderable metal coating is to be provided and in which the resist serves also as an etch resist for metal areas over which it is arranged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.