Method for forming a buried contact in a semiconductor device
US5162259A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 1991 |
| Grant date | Nov 10, 1992 |
| Priority date | — |
| Expiry date | Feb 4, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76895
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a buried contact (50) in a semiconductor device (20) which avoids etch damage to the substrate and forms a self-aligned, low resistance contact to a silicon substrate (22) is provided. After forming a contact opening (32) through overlying insulating and conducting layers (24, 28,30), a silicide region (40) is formed in the substrate at the contact surface (34) exposed by the contact opening (32). A refractory metal silicide which provides high etching selectivity to polysilicon is formed in the substrate at the contact surface (34) by either a blanket deposition of a refractory metal into the contact opening (32), or alternatively, by a selective deposition process using contact surface (34) as a nucleation site. In a preferred embodiment, a cobalt or tantalum silicide region (40) is formed in the substrate at the contact surface (34) and a conductive layer (42) is deposited and etched to form an interconnect (48) contacting the silicide region (40). The high etching selectivity obtainable between the conductive layer ( 42) and the silicide region (40) avoids damage to the substrate surface providing improved device performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.