Robert E. Jones
48Patents
20h-index
43Co-inventors
85Inventor score
Filing activity: Feb 18, 1976 → May 30, 2017
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6555858B1 | Self-aligned magnetic clad write line and its method of formation | Performing Operations; Transporting | 130 | Expired |
| US5716875A | Method for making a ferroelectric device | Electricity | 97 | Expired |
| US6576532B1 | Semiconductor device and method therefor | Emerging Cross-Sectional Technologies | 87 | Expired |
| US6344413B1 | Method for forming a semiconductor device | Electricity | 72 | Expired |
| US5313089A | Capacitor and a memory cell formed therefrom | Electricity | 69 | Expired |
| US5162259A | Method for forming a buried contact in a semiconductor device | Electricity | 62 | Expired |
| US5773314A | Plug protection process for use in the manufacture of embedded dynamic random access memory (DRAM) cells | Electricity | 60 | Expired |
| US6130102A | Method for forming semiconductor device including a dual inlaid structure | Electricity | 52 | Expired |
| US5405796A | Capacitor and method of formation and a memory cell formed therefrom | Electricity | 48 | Expired |
| US5696394A | Capacitor having a metal-oxide dielectric | Electricity | 47 | Expired |
| US5439840A | Method of forming a nonvolatile random access memory capacitor cell having a metal-oxide dielectric | Electricity | 44 | Expired |
| US5337207A | High-permittivity dielectric capacitor for use in a semiconductor device and process for making the same | Electricity | 40 | Expired |
| US7074664B1 | Dual metal gate electrode semiconductor fabrication process and structure thereof | Electricity | 40 | Expired |
| US6010927A | Method for making a ferroelectric device having a tantalum nitride barrier layer | Electricity | 34 | Expired |
| US5583068A | Process for forming a capacitor having a metal-oxide dielectric | Electricity | 31 | Expired |
| US6531731B2 | Integration of two memory types on the same integrated circuit | Emerging Cross-Sectional Technologies | 27 | Expired |
| US5190893A | Process for fabricating a local interconnect structure in a semiconductor device | Electricity | 26 | Expired |
| US6235603A | Method for forming a semiconductor device using an etch stop layer | Electricity | 24 | Expired |
| US6274424A | Method for forming a capacitor electrode | Electricity | 23 | Expired |
| US6790727B2 | Integration of two memory types on the same integrated circuit | Emerging Cross-Sectional Technologies | 22 | Expired |
| US3988698A | Plasma tube and method of manufacture | Electricity | 19 | Expired |
| US5567636A | Process for forming a nonvolatile random access memory array | Physics | 17 | Expired |
| US6916669B2 | Self-aligned magnetic clad write line and its method of formation | Performing Operations; Transporting | 16 | Expired |
| US5998258A | Method of forming a semiconductor device having a stacked capacitor structure | Electricity | 15 | Expired |
| US7772048B2 | Forming semiconductor fins using a sacrificial fin | Electricity | 15 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.