Method of fabricating a high resistance polysilicon load resistor
US5168076A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1991 |
| Grant date | Dec 1, 1992 |
| Priority date | — |
| Expiry date | Jul 1, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/136
Abstract
A load resistor for use in a semiconductor integrated circuit consists of two portions of conductive material, typically strips of either a silicide or a composite polycrystalline silicon layer and silicide layer formed thereon, formed on a semiconductor substrate and separated from each other by a selected distance. An electrically conductive dopant diffusion barrier is formed on the first and second portions of conductive material. A polycrystalline silicon material is then placed on the structure such that one portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the first portion of conductive material and the other portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the second portion of conductive material. Typically the polycrystalline silicon material is placed on an insulation layer formed on the semiconductor substrate in the portion of the substrate between the two portions of conductive material. The diffusion barrier prevents any dopant from the conductive material from diffusing into the polycrystalline silicon material thereby allowing the polycrystalline silicon mater…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.