Semiconductor integrated circuit device with guardring regions to prevent the formation of an MOS diode
US5168340A · kind A · utility
38Cited by
8References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 12, 1990 |
| Grant date | Dec 1, 1992 |
| Priority date | — |
| Expiry date | Oct 12, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
Abstract
This invention relates to a semiconductor integrated circuit device wherein guardring regions are formed between a first element region and a second element region so as to surround the first element region, wherein gate electrodes are provided to cross the guardring regions, wherein the guardring regions are continuously formed even directly below the gate electrodes, and wherein an insulator film directly below the gate electrodes is relatively thick.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.