Semiconductor memory
US5170374A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 1992 |
| Grant date | Dec 8, 1992 |
| Priority date | — |
| Expiry date | Apr 7, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.