Transceiver with isolated power rails for ground bounce reduction

US5173621A · kind A · utility

Assignee

• FAIRCHILD SEMICONDUCTOR CORPORATION · US

Inventors

• Dana Fraser · Panama City, US
• Ray A. Mentzer · Corvallis, US
• Jerry D. Gray · San Jose, US
• Geoff Hannington · South Portland, US
• Susan M. Keown · Portland, US
• Gaetan L. Mathieu · Varennes, CA

Key dates

• Filing date: Jul 12, 1991
• Grant date: Dec 22, 1992
• Expiry date: Jul 12, 2011

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3011
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Circuit configurations are described for use with split lead leadframes and relatively isolated quiet and noisy power rails to reduce power rail noise and circuit noise. An octal register transceiver circuit incorporates a latch (300) coupled to relatively quiet power rails (42,44) and an output buffer circuit (400) having an input circuit coupled to the latch (300) and relatively quiet power rails (42,44). The output driver transistors (Q433,Q434) of the output buffer circuit (400) are coupled to the relatively noisy output power rails (52,54) to isolate the latch circuit from power rail noise and minimize erroneous operation of the latch. A DC Miller Killer circuit (450) is constructed with delay control components (D456,D457,R460) and an alternative discharge path (R458,D459) to reduce aggravation of power rail noise during operation of DCMK.