Output logic macrocell with enhanced functional capabilities
US5191243A · kind A · utility
34Cited by
7References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 6, 1991 |
| Grant date | Mar 2, 1993 |
| Priority date | — |
| Expiry date | May 6, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1736
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output logic macrocell ("OLMC") containing an exclusive OR gate is associated with the product terms and other outputs of a logic block such as a programmable logic array. The OLMC is capable of providing enhanced functions, including cascaded exclusive OR gates, function sharing, T and J-K flip-flop emulation, asynchronous clocking, and a reset selection. In addition, a logic block is used as the source of an asynchronous clock pulse and is connected to the global clock distribution system of a device such as a high density programmable logic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.