High-sensitivity, low-noise transistor amplifier
US5192920A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 1992 |
| Grant date | Mar 9, 1993 |
| Priority date | — |
| Expiry date | Mar 18, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/372
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high-gain, low-noise transistor amplifier comprises an input, an output, and first and second field effect transistors each having a gate, a drain, and a source and being formed in a common semiconductor substrate. The second transistor is a depletion mode transistor if it is of the same conductivity type as the first but is an enhancement mode transistor if it is of opposite conductivity type with respect to the first. In an amplifier configuration, the input is coupled to the gate of the first transistor, the source of the first transistor is coupled to the gate of the second transistor, the source of the second transistor is coupled to the output, and there is a direct-coupled feedback path from the source of the second transistor to the drain of the first transistor. At least the first transistor is formed in an isolated well of conductivity opposite to that of the substrate in the semiconductor substrate and its source is coupled directly to that well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.