Fermi threshold field effect transistor with reduced gate and diffusion capacitance
US5194923A · kind A · utility
17Cited by
3References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 28, 1992 |
| Grant date | Mar 16, 1993 |
| Priority date | — |
| Expiry date | Jan 28, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/637
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved Fermi FET structure with low gate and diffusion capacity allows conduction carriers to flow within the channel at a predetermined depth in the substrate below the gate, without requiring an inversion layer to be created at the surface of the semiconductor. The low capacity Fermi FET is preferably implemented using a Fermi Tub having a predetermined depth, and with a conductivity type opposite the substrate conductivity type and the same conductivity type as the drain and source diffusions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.