Method of fabricating an integrated circuit having active regions near a die edge
US5196378A · kind A · utility
26Cited by
5References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 25, 1991 |
| Grant date | Mar 23, 1993 |
| Priority date | — |
| Expiry date | Mar 25, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/168
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method of scribing and separating dice from each other after fabrication in a semiconductor wafer in a manner such that active circuit regions in the dice reside as near to an edge of a die as possible. The wafer is anistropically etched through the active layer and into the substrate through an opening in the mask to form a generally V-shaped channel with the dice then being separated along a vertex of the channel. The dice are then positioned to abut each other in the form of a mosaic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.