Patent · US Expired

High pin count and multi-layer wiring lead frame

US5196725A · kind A · utility

29Cited by
6References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 6, 1991
Grant dateMar 23, 1993
Priority date
Expiry dateJun 6, 2011

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3011
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A high pin count and multi-layer lead frame according to the present invention which has a short pitch, high density lead pattern and at the same time, enhanced transmission characteristics for high-frequency signals includes at least one pair of conductive layers for grounding, power supply or both of them and one pair of insulating layers formed on these conductive layers, inner leads formed on the insulating layer on the top conductive layer by etching or vapor deposition in a short pitch, high density pattern, and outer leads made of metal frame. The inner leads are electrically connected to the leads for signals of the outer leads, the leads for grounding and power supply of the outer leads are connected to each of the conductive layers separately, and a plurality of holes for wire bonding the electrodes of a semiconductor element to each of the conductive layers are formed on each of the insulating layers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.