Method and apparatus for testing semiconductor integrated circuit
US5198757A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 18, 1991 |
| Grant date | Mar 30, 1993 |
| Priority date | — |
| Expiry date | Jul 18, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2273
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus for testing a semiconductor integrated circuit by using probe lines and sense lines, has a selection device for applying a selective signal in sequence to one of the probe lines, and electronic switch devices incorporated in the integrated circuit so that the electronic switch devices and intersections, where the probe lines and sense lines intersect each other, are in one-to-one correspondence and the electronic switch devices can feed signals to their corresponding sense lines in response to selective signals applied to the probe lines. Each electronic switch device is connected to test points in the integrated circuit and connected to its corresponding sense line. Many level quantization devices are provided for generating many-level quantized signal, corresponding to one of combinations of binary signals on the test points connected to the electronic switches of each electronic switch device, to its corresponding sense line, and two-level quantization devices convert the many-level quantized signal, generated on each sense line, to reproduced binary signals corresponding to the one of combinations of the binary signals on the test points.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.