High flow-rate synchronizer/scheduler apparatus and method for multiprocessors
US5202987A · kind A · utility
Inventors
Key dates
| Filing date | Jan 15, 1991 |
| Grant date | Apr 13, 1993 |
| Priority date | — |
| Expiry date | Jan 15, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high flow-rate synchronizer/scheduler apparatus for a mutiprocessor system during program run-time, comprises a connection matrix for monitoring and detecting computational tasks which are allowed for execution containing a task map and a network of nodes for distributing to the processors information or computational tasks detected to be enabled by the connection matrix. The network of nodes possesses the capability of decomposing information on a pack of allocated computational tasks into messages of finer sub-packs to be sent toward the processors, as well as the capability of unifying packs of information on termination of computational tasks into a more comprehensive pack. A method of performing the synchronization/scheduling in a multiprocessor system of this apparatus is also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.