Multi-processor caches with large granularity exclusivity locking
US5210848A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 9, 1992 |
| Grant date | May 11, 1993 |
| Priority date | — |
| Expiry date | Jul 9, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0822
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A tightly coupled multi-processor (MP) system is provided with large granularity locking of exclusivity in multi-processor caches. The unique access right for a processor P.sub.i is enforced by giving other central processors (CPs) a temporarily invalid (TI) state on block B, even though some lines in the block B may still be resident in the cache. Any CP trying to access a block in the TI state will need to talk to the storage control element (SCE) to obtain proper authorization (e.g., RO or EX state) on the block. Assuming that a CP may have three states on a block B, temporarily invalid TI.sub.B, read only RO.sub.B and exclusive EX.sub.B, TI.sub.B is the initial state for all B at all CPs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.