Method for isolating SiO.sub.2 layers from PZT, PLZT, and platinum layers
US5212620A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 1992 |
| Grant date | May 18, 1993 |
| Priority date | — |
| Expiry date | Mar 3, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/435
Abstract
An improved method for constructing integrated circuit structures in which a buffer SiO.sub.2 layer is used to separate various components comprising ferroelectric materials or platinum is disclosed. The invention prevents interactions between the SiO.sub.2 buffer layer and the ferroelectric materials. The invention also prevents the cracking in the SiO.sub.2 which is commonly observed when the SiO.sub.2 layer is deposited directly over a platinum region on the surface of the circuit. The present invention utilizes a buffer layer of material which is substantially inert with respect to the ferroelectric material and which is also an electrical insulator to separate the SiO.sub.2 layer from the ferroelectric material and/or the platinum regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.