Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation
US5212777A · kind A · utility
402Cited by
9References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 17, 1989 |
| Grant date | May 18, 1993 |
| Priority date | — |
| Expiry date | Nov 17, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8015
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a multiprocessor system arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the processor memory links. The entire image processor, including the individual processors, the crossbar switch and the memories are contained on a single silicon chip. Each processor can operate to execute the same instruction at the same time (SIMD mode) or different instructions at the same time (MIMD mode).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.