Sense circuit for reading data stored in nonvolatile memory cells
US5218570A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 1991 |
| Grant date | Jun 8, 1993 |
| Priority date | — |
| Expiry date | Feb 19, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense circuit for reading EPROM and ROM type memory cells employs a circuit for generating an offsetting current which is exempt of error during transients and which thus permits to achieve a reduced access time. On the other hand, the sense circuit maintains the intrinsic advantages of a current-offset sensing architecture which is represented by a substantially unlimited operating voltage range toward the maximum value VCC.sub.max. The current generating circuit is driven by means of a supplementary row of cells which is decoded at every reading and which replicates, during transients, the behaviour of the row selected for the reading.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.