Controlled etching process for forming fine-geometry circuit lines on a substrate

US5221421A · kind A · utility

Assignee

• Hewlett-Packard Company, L.P. · US

Inventors

• Jacques Leibovitz · San Jose, US
• Daniel J. Miller · San Francisco, US
• Maria L. Cobarruviaz · Cupertino, US
• John P. Scalia · San Jose, US
• Howard H. Nakano · Corvallis, US
• Voddarahalli K. Nagesh · Cupertino, US
• Clinton Chao · Baoshan, TW

Key dates

• Filing date: Mar 25, 1992
• Grant date: Jun 22, 1993
• Expiry date: Mar 25, 2012

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02P10/20
• WIPO field: Materials, metallurgy
• WIPO sector: Chemistry

Abstract

A specialized etching method for producing fine-geometry gold circuit structures. Production thereof is accomplished by maintaining a constant gold etching rate. Metal etching normally slows as the amount of dissolved gold (a reaction product of the etching process) increases. To remove the dissolved gold, one method involves cooling the etchant to precipitate a gold complex therefrom. The remaining, recovered etchant is then heated and made available for continued etching. Another method involves a cathode/anode assembly which is immersed in the etchant. Activation of the assembly recovers metallic gold and regenerates the etchant. These methods, when used continuously or periodically in a dip or spray etching system, maintain a constant etching rate. As a result, fine-geometry circuit structures may be accurately produced while minimizing material costs (e.g. etchant use) and minimizing the production of undesirable waste products and disposal expenses associated therewith.