Static type RAM
US5226011A · kind A · utility
22Cited by
1References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 28, 1991 |
| Grant date | Jul 6, 1993 |
| Priority date | — |
| Expiry date | Jan 28, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static type RAM performs latch of supplied address signals by rise or fall edge of clock pulses supplied from the outside, and performs the write operation continuously while write control signals are activated, and substantially opens a data output terminal in the period. Also an address buffer of the RAM is activated by a definite time required for the state that the supplied address signals are latched by timing pulses formed based on the clock pulses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.