Semiconductor memory device having error correcting function
US5233610A · kind A · utility
80Cited by
13References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 1990 |
| Grant date | Aug 3, 1993 |
| Priority date | — |
| Expiry date | Aug 29, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device comprises a memory array, a test mode detecting circuit, an address counter, a correction circuit, and a data counter. When a test mode enable signal is applied externally to the test mode detecting circuit, the address counter sequentially addresses the memory array. The correction circuit detects the error of the data sequentially read out from the memory array. The data counter counts the number of data to be corrected by said correction circuit. The counting result is outputted to the exterior.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.