Laser trimmed integrated circuit
US5235205A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 17, 1992 |
| Grant date | Aug 10, 1993 |
| Priority date | — |
| Expiry date | Mar 17, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76894
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method including covering the area to be laser trimmed with a first insulative layer having a thickness sufficiently thin that a layer can trim the area through the first insulative layer. An etch stop is formed on the first insulative layer over the area to be trimmed and covered with a second insulative layer. A portion of the second insulative layer is etched to expose the etch stop and a portion of the etch stop is then removed to expose a portion of the first insulative layer and laser trimming is conducted through the exposed first insulative layer. The etch stop is part of a first level of interconnects made of the same material and simultaneously with the etch stop. The area to be trimmed is part of a second level of contacts that interconnect another second material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.