Method of repairing overerased cells in a flash memory
US5237535A · kind A · utility
149Cited by
11References
38Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 9, 1991 |
| Grant date | Aug 17, 1993 |
| Priority date | — |
| Expiry date | Oct 9, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of repairing overerased cells in a flash memory array including a column having a first cell and a second cell is described. Repair begins by determining whether a first cell is overerased and applying a programming pulse if so. Next, the second cell is examined to determine whether it is overerased. A programming pulse is applied to the second cell if it is overerased. Afterward, if either of the cells was overerased then the repair pulse voltage level is incremented. These steps are repeated until none of the cells on the column is identified as overerased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.