Amit Merchant
38Patents
24h-index
28Co-inventors
85Inventor score
Filing activity: Oct 9, 1991 → Sep 30, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5237535A | Method of repairing overerased cells in a flash memory | Physics | 149 | Expired |
| US6385715B1 | Multi-threading for a processor utilizing a replay queue | Physics | 84 | Expired |
| US6889319B1 | Method and apparatus for entering and exiting multiple threads within a multithreaded processor | Physics | 84 | Expired |
| US6496925B1 | Method and apparatus for processing an event occurrence within a multithreaded processor | Physics | 83 | Expired |
| US5327383A | Method and circuitry for erasing a nonvolatile semiconductor memory incorporating row redundancy | Physics | 78 | Expired |
| US5893151A | Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests | Physics | 73 | Expired |
| US5377147A | Method and circuitry for preconditioning shorted rows in a nonvolatile semiconductor memory incorporating row redundancy | Physics | 71 | Expired |
| US5347489A | Method and circuitry for preconditioning shorted rows in a nonvolatile semiconductor memory incorporating row redundancy | Physics | 61 | Expired |
| US6163838A | Computer processor with a replay system | Physics | 52 | Expired |
| US5572703A | Method and apparatus for snoop stretching using signals that convey snoop results | Physics | 42 | Expired |
| US7039794B2 | Method and apparatus for processing an event occurrence for a least one thread within a multithreaded processor | Physics | 42 | Expired |
| US6772322B1 | Method and apparatus to monitor the performance of a processor | Physics | 41 | Expired |
| US5682516A | Computer system that maintains system wide cache coherency during deferred communication transactions | Physics | 40 | Expired |
| US5890200A | Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests | Physics | 38 | Expired |
| US6334182A | Scheduling operations using a dependency matrix | Physics | 38 | Expired |
| US7200737B1 | Processor with a replay system that includes a replay queue for improved throughput | Physics | 37 | Expired |
| US6792446B2 | Storing of instructions relating to a stalled thread | Physics | 36 | Expired |
| US5737759A | Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests | Physics | 35 | Expired |
| US5875467A | Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests | Physics | 35 | Expired |
| US6785803B1 | Processor including replay queue to break livelocks | Physics | 32 | Expired |
| US5797026A | Method and apparatus for self-snooping a bus during a boundary transaction | Physics | 31 | Expired |
| US5572702A | Method and apparatus for supporting read, write, and invalidation operations to memory which maintain cache consistency | Physics | 28 | Expired |
| US6094717A | Computer processor with a replay system having a plurality of checkers | Physics | 27 | Expired |
| US6212626A | Computer processor having a checker | Physics | 24 | Expired |
| US5737758A | Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests | Physics | 23 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.