SRAM with dual word lines overlapping drive transistor gates
US5239196A · kind A · utility
69Cited by
3References
11Claims
0Family size
Inventors
Key dates
| Filing date | Feb 11, 1991 |
| Grant date | Aug 24, 1993 |
| Priority date | — |
| Expiry date | Feb 11, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
Abstract
A MOSFET Static Random Access Memory (SRAM) cell has a symmetrical construction, with a pair of word lines. The word lines are in second level polysilicon, so that they may overlap the driving transistor gates which are in first level polysilicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.