Method of structuring a semiconductor chip

US5242533A · kind A · utility

Assignee

• Robert Bosch GmbH · DE

Inventors

• Hans-Peter Trah · Reutlingen, DE
• Guenther Findler · Stuttgart, DE
• Joerg Muchow · Reutlingen, DE

Key dates

• Filing date: Jan 30, 1992
• Grant date: Sep 7, 1993
• Expiry date: Jan 30, 2012

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/924
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Processes are proposed for structuring monocrystalline semiconductor substrates provided with a basic doping, in particular silicon substrates with a (100) or (110) crystal orientation. In this process, at least one main surface of the semiconductor substrate is passivated by means of a structured masking layer, and in an etching step etching into the semiconductor substrate is done anisotropically through openings in the masking layer. It is proposed that as the masking layer (12), a structured, preferably monocrystalline, layer of the basic material of the semiconductor substrate be used, which is doped such that a pn junction is produced between the masking layer (12) and the semiconductor substrate (10), the junction being polarized in the depletion direction and serving as an etch stop. It is also proposed that the semiconductor substrate (10) be formed of a substrate (11) and at least one layer (13), applied thereon, with buried zones (16), with pn junctions being produced between the zones (16) and the substrate (11). Zones (16) that are electrically insulated from one another and the semiconductor substrate (10) are electrically bonded, so that the pn junctions are polarize…