Apparatus for synchronously generating clock signals in a data processing system
US5243703A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1992 |
| Grant date | Sep 7, 1993 |
| Priority date | — |
| Expiry date | Mar 5, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/108
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for synchronously generating a first clock signal in a first circuitry and a second clock signal in a second circuitry of a data processing system is described. A clock generating circuitry generates a global clock signal. A transmission line transfers the global clock signal from its first end to its second end and includes a midpoint between the first end and the second end. A first clock signal generation circuit is coupled at a first point between the first end and the midpoint and a second point between the midpoint and the second end. The first and second points have the same line length to the midpoint. The first clock signal generation circuit generates the first clock signal at a first timing point which is halfway between the global clock signal with a first propagation delay from the first end to the first point and the signal with a second propagation delay from the first end to the second point. A second clock signal generation circuit is coupled at a third point between the first end and the midpoint and a fourth point between the midpoint and the second end. The third and fourth points have the same line length to the midpoint. The second clock signal ge…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.