Semiconductor device package with solder bump electrical connections on an external surface of the package
US5249098A · kind A · utility
21Cited by
23References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 28, 1992 |
| Grant date | Sep 28, 1993 |
| Priority date | — |
| Expiry date | Jul 28, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/0306
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Wells are formed in an external surface of a semiconductor device package body. Capacitors are disposed within the wells at least partially, and preferably fully within the body. Cleaning channels are formed underneath the capacitors, for removing residual flux and/or solder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.