Double well substrate plate trench DRAM cell array
US5250829A · kind A · utility
37Cited by
9References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 9, 1992 |
| Grant date | Oct 5, 1993 |
| Priority date | — |
| Expiry date | Jan 9, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/37
Abstract
A high density substrate plate DRAM cell memory device and process are described in which a buried well region is formed adjacent to deep trench capacitors such that the substrate region of DRAM transfer FETs can be electrically isolated from other FETs on a semiconductor substrate. The buried region is partially formed by ion implantation and diffusion to intersect the walls of the deep trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.