Targeted resets in a data processor including a trace memory to store transactions
US5251227A · kind A · utility
35Cited by
57References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 17, 1992 |
| Grant date | Oct 5, 1993 |
| Priority date | — |
| Expiry date | Mar 17, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Resets on a data processing system are targeted to specific locations of that processing system and have different effects. Some resets are transparent to instruction execution while other resets will interrupt the normal execution of instructions. In addition, in a multi-zone environment resets in one zone do not automatically propagate to the other zone; instead, each zone generates its own resets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.