Thomas D. Bissett
33Patents
26h-index
37Co-inventors
85Inventor score
Filing activity: Sep 4, 1987 → May 5, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5588112A | DMA controller for memory scrubbing | Physics | 131 | Expired |
| US5255367A | Fault tolerant, synchronized twin computer system with error checking of I/O communication | Physics | 96 | Expired |
| US5291494A | Method of handling errors in software | Physics | 83 | Expired |
| US4907228A | Dual-rail processor with error checking at single rail interfaces | Physics | 83 | Expired |
| US5099485A | Fault tolerant computer systems with fault isolation and repair | Physics | 83 | Expired |
| US5896523A | Loosely-coupled, synchronized execution | Physics | 80 | Expired |
| US5600784A | Fault resilient/fault tolerant computing | Physics | 67 | Expired |
| US5153881A | Method of handling errors in software | Physics | 55 | Expired |
| US5185877A | Protocol for transfer of DMA data | Physics | 55 | Expired |
| US5005174A | Dual zone, fault tolerant computer system with error checking in I/O writes | Physics | 54 | Expired |
| US5347559A | Apparatus and method of data transfer between systems using different clocks | Electricity | 53 | Expired |
| US5068780A | Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones | Physics | 50 | Expired |
| US5249187A | Dual rail processors with error checking on I/O reads | Physics | 50 | Expired |
| US6279119A | Fault resilient/fault tolerant computing | Physics | 49 | Expired |
| US5065312A | Method of converting unique data to system data | Physics | 48 | Expired |
| US5068851A | Apparatus and method for documenting faults in computing modules | Physics | 46 | Expired |
| US4916704A | Interface of non-fault tolerant components to fault tolerant system | Physics | 45 | Expired |
| US8812907B1 | Fault tolerant computing systems using checkpoints | Physics | 41 | Active |
| US5790397A | Fault resilient/fault tolerant computing | Physics | 39 | Expired |
| US5956474A | Fault resilient/fault tolerant computing | Physics | 38 | Expired |
| US6473869B2 | Fault resilient/fault tolerant computing | Physics | 37 | Expired |
| US5339408A | Method and apparatus for reducing checking costs in fault tolerant processors | Electricity | 37 | Expired |
| US5048022A | Memory device with transfer of ECC signals on time division multiplexed bidirectional lines | Physics | 37 | Expired |
| US5615403A | Method for executing I/O request by I/O processor after receiving trapped memory address directed to I/O device from all processors concurrently executing same program | Physics | 36 | Expired |
| US5251227A | Targeted resets in a data processor including a trace memory to store transactions | Physics | 35 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.