Semiconductor package
US5252783A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 10, 1992 |
| Grant date | Oct 12, 1993 |
| Priority date | — |
| Expiry date | Feb 10, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package is provided having a die attach flag (12) with integral flanges (13) which prevent high pressure plastic encapsulant (18) from escaping or entering between the die attach flag (12) and a mold cavity plate (15) during encapsulation. The die attach flag (12) is held flush against the cavity plate (15) by the packing pressure of the encapsulant (18) during low pressure stages of the encapsulation process. Plastic flowing along the flange (13) solidifies more rapidly than plastic in the body of the semiconductor package, thereby damming plastic flow at the edges of the die attach flag (12) during high pressure stages of the encapsulation process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.