Method of forming isolated regions of oxide
US5260229A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 1991 |
| Grant date | Nov 9, 1993 |
| Priority date | — |
| Expiry date | Aug 30, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for forming isolated regions of oxide of an integrated circuit, and an integrated circuit formed according to the same. A pad oxide layer is formed over a portion of a substrate. A first silicon nitride layer is formed over the pad oxide layer. A polysilicon buffer layer is then formed over the first silicon nitride layer. A second silicon nitride layer is formed over the polysilicon layer. A photoresist layer is formed and patterned over the second silicon nitride layer. An opening is etched through the second silicon nitride layer and the polysilicon buffer layer to expose a portion of the first silicon nitride layer. A third silicon nitride region is then formed on at least the polysilicon buffer layer exposed in the opening. The first silicon nitride layer is etched in the opening. A field oxide region is then formed in the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.