Dual path memory retrieval system for an interleaved dynamic RAM memory unit
US5261068A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 1990 |
| Grant date | Nov 9, 1993 |
| Priority date | — |
| Expiry date | May 25, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital computer having a dual path memory retrieval system for a dynamic RAM memory unit comprised of any number of interleaved memory banks. The system includes means for asserting and deasserting an access signal to specified locations of the interleaved memory banks, a multiplexer having a pair of input channels for each memory bank and a pair of data paths from the output of each memory bank to the corresponding input channels of the multiplexer. The first data path is a direct path between the memory bank and a first one of the pair of input channels and the second data path is a latched path between the memory bank and a second one of the pair of input channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.