Patent · US Expired

Method to produce complementary heterojunction bipolar transistors

US5262335A · kind A · utility

9Cited by
1References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 8, 1991
Grant dateNov 16, 1993
Priority date
Expiry dateOct 8, 2011

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S148/072

Abstract

Disclosed is a method for fabricating complementary heterojunction bipolar transistors on a common substrate. The method comprises the steps of depositing a PNP profile by molecular beam epitaxy on an appropriate substrate and then depositing a layer of silicon nitride on the PNP profile just deposited. The substrate is then heated in a vacuum in order to densify the silicon nitride. A mask and resist layer are used to produce the desired PNP profile patterns. The NPN profile is deposited on the area of the substrate etched away as well as on the silicon nitride layer protecting the already deposited PNP layers. The NPN profile is then patterned using a resist and masking process. The polycrystalline NPN area on top of the silicon nitride layer and the remaining silicon nitride layer are etched away forming two adjacent complementary NPN and PNP profiles on a common substrate. In the fabrication of the heterojunction bipolar transistor circuits, the P-ohmic contacts on both the NPN and PNP materials is evaporated at the appropriate locations simultaneously. All of the N-ohmic contacts are also deposited simultaneously. By this, the complementary dual heterojunction bipolar transist…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.