Fabricating dual gate thin film transistors
US5266515A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 1992 |
| Grant date | Nov 30, 1993 |
| Priority date | — |
| Expiry date | Mar 2, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/126
Abstract
A method for fabricating a dual gate thin film transistor using a power MOSFET process having a first gate area (22) made from a monocrystalline silicon. A dielectric layer (25) is formed over the monocrystalline silicon. A first gate electrode (58) contacts the first gate area (22). A thin film transistor is fabricated on a first island of polysilicon (29) over the dielectric layer (25). The thin film transistor has a second gate electrode (55), and drain and source electrodes (56, 57) wherein the drain and source electrodes (56, 57) contact different portions of the first island of polysilicon (29). Preferably, the first gate electrode (58) is coupled to the second gate electrode (55).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.