Method of making dielectric and conductive isolated island
US5268326A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 1992 |
| Grant date | Dec 7, 1993 |
| Priority date | — |
| Expiry date | Sep 28, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/928
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A dielectric and conductive isolated island is fabricated by providing an active wafer having a first and a second major surface, a doped region extending from the first surface, and a trench formed at the first surface. A conductive layer is formed on the first surface and in the trench. A planarizable layer comprised of a dielectric layer is then formed on the conductive layer. A handle wafer is bonded to the planarizable layer. The active wafer and the handle wafer are heated so that the doped region diffuses along the conductive layer to form an equalized concentration of dopant along the conductive layer which diffuses into the active wafer to form the doped region adjacent all of the conductive layer. A portion of the second surface of the active wafer is then removed so that at least a portion of the dielectric layer of the planarizable layer is exposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.