Output buffer circuits for reducing ground bounce noise
US5268868A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | May 21, 1991 |
| Grant date | Dec 7, 1993 |
| Priority date | — |
| Expiry date | May 21, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An output circuit is provided which includes a first switch coupled between a first power supply terminal and an output terminal, a second switch coupled between the first power supply terminal and the output terminal, an arrangement to set the output terminal at a high impedance state, and a first variable delay coupled to a first input terminal for turning on the first switch and the second switch with different timing from each other and for turning off the first switch and the second switch simultaneously. In addition, the output circuit includes a third switch coupled between the output terminal and a second power supply terminal, a fourth switch coupled between the output terminal and the second power supply terminal, and a second variable delay coupled to a second input terminal for turning on the third switch and the fourth switch with different timing from each other and for turning off the third switch and the fourth switch simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.