Electrically programmable antifuse and fabrication processes
US5272101A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 1991 |
| Grant date | Dec 21, 1993 |
| Priority date | — |
| Expiry date | Aug 9, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating a metal-to-metal antifuse in a process sequence for forming a double layer metal interconnect structure includes the steps of forming and defining a first metal interconnect layer, forming and planarizing an inter-metal dielectric layer, forming an antifuse cell opening in the inter-metal dielectric layer, forming and defining an antifuse layer, forming metal-to-metal via holes in the inter-metal dielectric layer, and forming and defining a second metal interconnect layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.