Method of making a relatively flat semiconductor package having a semiconductor chip encapsulated in molded material
US5275975A · kind A · utility
8Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1992 |
| Grant date | Jan 4, 1994 |
| Priority date | — |
| Expiry date | Jul 1, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49121
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A flat package for semiconductor integrated circuit devices allows edge-mounting and surface-mount. The package may be molded plastic containing a semiconductor chip, and flat leads extend from one edge of the package. The leads are bent to provide an area to solder to conductors on a PC board. Mechanical positioning, mechanical support and spacing are provided by studs extending from the edge of the package adjacent the leads. The studs have stops formed at a position even with flat outer surfaces of the bent leads; the portion outward of the stops fits into holes in the PC board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.