Method and apparatus for performing carry look-ahead addition in a data processor
US5276635A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 1993 |
| Grant date | Jan 4, 1994 |
| Priority date | — |
| Expiry date | Jun 1, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/508
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A carry look-ahead (CLA) adder accommodates a late carry-in from a low-order external 32-bit adder to enable a 96-bit addition to be performed in the same time in which the CLA adder (60) performs a 64-bit addition. Within each adder slice, intermediate group propagate and group generate terms are generated for each bit location in the adder (60), while the adder simultaneously generates an n-bit group propagate and group generate term. The intermediate group propagate and group generate terms are combined with carry-in terms to generate, in parallel, local carry-out terms within each adder slice. The local carry-out terms and intermediate group propagate and group generate terms are used to form a carry chain path which allows the adder to delay the carry-in of an external carry term.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.