Integrated semiconductor circuit
US5276643A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1991 |
| Grant date | Jan 4, 1994 |
| Priority date | — |
| Expiry date | Nov 26, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated semiconductor circuit includes word lines and bit lines. A memory region has at least one memory cell field with memory cells addressable through the word lines and the bit lines, and a number of evaluator circuits corresponding to the number of the bit lines. Each of the evaluator circuits is connected with one of the bit lines and divides the one bit line into two at least approximately identical bit line halves. Logic units of a block perform digital processing of data read-out of the memory region through the bit lines and evaluated. Each of the logic units is connected to the two bit line halves of one of the bit lines. Various operating modes of the block of logic units are selected with mode select signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.