Data processing device with common memory connecting mechanism
US5276836A · kind A · utility
77Cited by
5References
4Claims
0Family size
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Key dates
| Filing date | Jan 10, 1991 |
| Grant date | Jan 4, 1994 |
| Priority date | — |
| Expiry date | Jan 10, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing device which includes a common memory connecting mechanism which is located between a memory bus to which copyback cache is connected, and a common memory. The common memory connecting mechanism includes a slave type transfer mechanism which directly assesses the common memory bypassing the cache and processes thereof, and a data mover which transfers data between the common memory and main memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.