Semiconductor memory device having cross-point DRAM cell structure

US5281837A · kind A · utility

Assignee

• Kabushiki Kaisha Toshiba · JP

Inventor

• Yusuke Kohyama · Yokosuka, JP

Key dates

• Filing date: May 23, 1991
• Grant date: Jan 25, 1994
• Expiry date: May 23, 2011

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/513

Abstract

For providing a semiconductor memory device that includes a plurality of cross-point memory cells each having a fine device structure and a high capacitance, a bit line is formed on an insulating substrate, and a word line is disposed above the substrate so as to cross the bit line. A MOS transistor with a vertical structure, whose gate electrode is used as the word line, is provided on the bit line. A MIM (Metal-Insulator-Metal) capacitor is provided on the MOS transistor.