Method and apparatus for testing LCD panel array
US5285150A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1990 |
| Grant date | Feb 8, 1994 |
| Priority date | — |
| Expiry date | Nov 26, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31724
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A hierarchical testing method is implemented taking advantage of the nature of the most common defects in an LCD panel to achieve fast effective parametric testing of LCD panels and the like. At the first hierarchy of testing, the panel is logically divided into zones and each zone tested in isolation to identify zones having at least one defect. At the next hierarchy, electro-optic assisted zone inspection is performed to identify where within the zone the defects are located. Lastly, every pixel is inspected using a voltage imaging method to determine whether the switching integrity of the pixel is acceptable. The testing apparatus includes a plurality of panel interface devices coupling the panel under test's drive lines and gate lines to a precision measurement unit (PMU). A controller determines the PMU signals and configures the panel interface devices. The PMU monitors select drive lines and gate lines to isolate zones having defects. An electro-optic voltage measurement system is used to identify the location of defects within an isolated zone.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.