Predictive historical cache memory
US5285527A · kind A · utility
50Cited by
11References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1990 |
| Grant date | Feb 8, 1994 |
| Priority date | — |
| Expiry date | Nov 29, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0862
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache memory functioning as a circular buffer for use as a part historical, part predictive cache memory is provided. A first register contains data having a value corresponding to a cache memory location of a last instruction executed by a processor and a second register contains data having a value corresponding to a memory location in the cache memory of a last prefetched instruction. Prefetching of instructions from a main memory to the cache memory is disabled if the difference between the values in the first and second pointer registers exceeds a predetermined amount.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.