Low voltage device in a high voltage substrate
US5286992A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 1993 |
| Grant date | Feb 15, 1994 |
| Priority date | — |
| Expiry date | Mar 29, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/901
Abstract
A semiconductor or substrate of a first conductivity type includes a well structure of a second conductivity type formed therein. A first low voltage MOS transistor includes spaced apart source and drain regions of the first conductivity type in the well. A first transistor gate lies above a channel region which is disposed between the source and drain regions of the first low voltage MOS transistor and is separated therefrom by a gate dielectric having a first thickness. A second high voltage transistor includes spaced apart source and drain regions of the first conductivity type in the well. A second transistor gate lies above a channel region which is disposed between the source and drain regions of the second high voltage transistor and is separated therefrom by a gate dielectric having a second thickness which is greater than the thickness of the gate dielectric of the first low voltage MOS transistor. A first contact diffusion, having the same conductivity type as the well, is located at the edge of the well closest to the first low voltage transistor, and is connected to a source of voltage. A second contact diffusion, having the same conductivity type as the well, is locate…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.