Diagonal wiring between abutting logic cells in a configurable logic array
US5296759A · kind A · utility
150Cited by
11References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 1993 |
| Grant date | Mar 22, 1994 |
| Priority date | — |
| Expiry date | Jun 18, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17728
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a configurable logic array that includes a plurality of individually configurable logic cells arranged in a matrix that includes a plurality of horizontal rows of logic cells and a plurality of vertical columns of logic cells. Adjacent abutting cells logic cells are interconnectable via horizontal and vertical configurable interconnections running between adjacent cells. Furthermore, configurable diagonal interconnections run between diagonally adjacent abutting logic cells in the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.