Frederick Curtis Furtek
50Patents
16h-index
32Co-inventors
84Inventor score
Filing activity: Dec 2, 1985 → Dec 31, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5144166A | Programmable logic cell and array | Electricity | 376 | Expired |
| US4918440A | Programmable logic cell and array | Electricity | 178 | Expired |
| US5894565A | Field programmable gate array with distributed RAM and increased cell utilization | Electricity | 165 | Expired |
| US4700187A | Programmable, asynchronous logic cell and array | Electricity | 160 | Expired |
| US6014509A | Field programmable gate array having access to orthogonal and diagonal adjacent neighboring cells | Electricity | 153 | Expired |
| US5296759A | Diagonal wiring between abutting logic cells in a configurable logic array | Electricity | 150 | Expired |
| US5245227A | Versatile programmable logic cell for use in configurable logic arrays | Electricity | 148 | Expired |
| US5218240A | Programmable logic cell and array with bus repeaters | Electricity | 99 | Expired |
| US5298805A | Versatile and efficient cell-to-local bus interface in a configurable logic array | Electricity | 84 | Expired |
| US5019736A | Programmable logic cell and array | Electricity | 83 | Expired |
| US4845633A | System for programming graphically a programmable, asynchronous logic cell and array | Emerging Cross-Sectional Technologies | 79 | Expired |
| US5652529A | Programmable array clock/reset resource | Electricity | 76 | Expired |
| US6167559A | FPGA structure having main, column and sector clock lines | Electricity | 73 | Expired |
| US5155389A | Programmable logic cell and array | Electricity | 57 | Expired |
| US5089973A | Programmable logic cell and array | Electricity | 42 | Expired |
| US6292021A | FPGA structure having main, column and sector reset lines | Electricity | 27 | Expired |
| US6026227A | FPGA logic cell internal structure including pair of look-up tables | Electricity | 15 | Expired |
| US7451280B2 | External memory controller node | Electricity | 14 | Active |
| US5504931A | Method and apparatus for comparing data sets | Electricity | 12 | Expired |
| US5430886A | Method and apparatus for motion estimation | Electricity | 12 | Expired |
| US5703498A | Programmable array clock/reset resource | Electricity | 9 | Expired |
| US9319066B2 | Parallel processing of data having data dependencies for accelerating the launch and performance of operating systems and other computing applications | Electricity | 7 | Active |
| US9647686B2 | Parallel processing of data having data dependencies for accelerating the launch and performance of operating systems and other computing applications | Electricity | 6 | Active |
| US11669526B2 | Parallel processing of data having data dependencies for accelerating the launch and performance of operating systems and other computing applications | Electricity | 5 | Active |
| US7225301B2 | External memory controller node | Electricity | 4 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.